The new eSPI Analysis Application and the eSPI Active Example Files are the latest addition to the Promira Serial Platform application library – increasing the functionality of the device to include eSPI debugging at 66MHz.
Total Phase is pleased to announce the release of the eSPI Analysis Application and eSPI Active Example Files for the Promira Serial Platform. The Promira platform is the next generation of embedded tools, combining a host adapter and a protocol analyzer into a single serial platform. The introduction of protocol analysis and support for the eSPI protocol increase the capabilities of the Promira platform making it stronger, faster and smarter than any other single device on the market.
When used in conjunction with the Data Center Software engineers will be able to capture and display eSPI bus data in true real-time through the Promira Serial Platform. In addition to the ability to non-intrusively monitor eSPI with the eSPI Analysis Application, Total Phase has also released active mastering for eSPI with eSPI Active Example Files available for all Promira platforms with SPI Active – Level 1, 2 or 3.
eSPI Analysis Application features for the Promira Serial Platform include the abilities to:
- Monitor communication between a master and slaves on data lines
- Support for single, dual and quad I/O
- Support for clock speeds up to 66MHz
- Monitor up to 5 channels (peripheral, virtual wire, OOB, Flash, Independent)
- Monitor up to 2 slave select lines
- Monitor 2 alert lines
- Monitor 2 reset lines
- Free software and API available
- Fully Windows, Linux, and Mac OS X compatible
“This new application underscores the maturation and versatility of the Promira Serial Platform. Introduced just one year ago, it now has a library of six applications spanning three protocols – I2C, SPI and now eSPI,” said Gil Ben-Dov, CEO of Total Phase. “With eSPI Analysis, system designers will experience improved test and deployment times for SPI flash controllers, SM Bus controllers (SMBC), Power management controllers (PMC) and GPIO Sources.”
Established by Intel, Enhanced Serial Peripheral Interface (eSPI) bus interface will replace Embedded Controller (EC), Baseboard Management Controller (BMC), and Super-I/O (SIO) communication over Low Pin Count (LPC) for legacy and rom based chips present on the motherboard. The interface provides more efficient architecture for the SPI flash controller, SM Bus controller, Power management controller and GPIO Sources. In short, it is an upgrade for motherboard specifications. However subtle the upgrade, its impact will be significant.
Source: prweb.com